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Urgent openings for design engineers in chennai

Overview

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Ad number:#826143310
Contact:DEVI
City:Chennai, India
Zip:600083
Compensation:18000

Description

Job Description
Good knowledge on Verilog. Language proficiency is expected to be very high.
SV exposure is a value addition.
Good knowledge in circuit design basics
Expert in integrating processor based SOC. Either the target could be ASIC or FPGA.
Exposure to Linting, Formal verification is value addition.
Simulation (RTL, GLS) is must.

Experience
0-3 Years

Location
Chennai
salary
18 k -22k + incentives + DA+ HRA extra
timing
day shift
if you are interested call
devi hr
9176074708

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